1. Field of the Invention
The present invention relates to a method of manufacturing a plurality of individual element arrays such as liquid crystal display element arrays, and also to a manufacturing method for a liquid crystal display device using the above method.
2. Description of the Related Art
Usually, individual arrays each having a semiconductor element, liquid crystal driving element or opposing electrode (which arrays will be hereinafter referred to as element arrays) are manufactured by forming a plurality of semiconductor elements, liquid crystal driving elements or opposing electrodes on a single substrate, and then cutting the substrate into a plurality of individual parts separated from each other. The substrate is usually formed of silicon or glass. In the following description, the substrate on which such plural elements have been formed will be referred to as a wafer.
FIGS. 3A, 3B and 3C show the steps of a wafer cutting method in the related art. As shown in FIG. 3A, a supporting tape 14 is bonded to a lower surface of a wafer 10 to support the wafer 10. The supporting tape 14 has a thermosetting or ultraviolet-setting adhesive layer. Then, as shown in FIG. 3B, the wafer 10 is completely cut in a thickness direction thereof, and the supporting tape 14 is partially cut in a thickness direction thereof, thereby forming a plurality of individual element arrays 16. The cutting of the wafer 10 and the supporting tape 14 is usually performed by using a dicing apparatus. Then, as shown in FIG. 3C, the supporting tape 14 is drawn to separate the individual element arrays 16 from each other.
Further, there is disclosed in Japanese Patent Publication No. 2-23324 another method including the steps of bonding an adhesive tape employing an ultraviolet-setting adhesive layer on an upper surface of a wafer, dicing the wafer, and then irradiating the adhesive tape with ultraviolet rays to harden the ultraviolet-setting adhesive layer.
In the usual wafer cutting method shown in FIGS. 3A to 3C, an upper surface 10A of the wafer 10 is not covered in cutting the wafer 10. Accordingly, dust generated in cutting the wafer 10 inclusive of the substrate such as silicon or glass and the supporting tape 14 is attached to the upper surface 10A of the wafer 10. The dust attached to the upper surface 10A of the wafer 10 cannot be completely removed by a wafer washing process. As a result, there will occur disconnection or short-circuit of wires formed in the elements or a cause of poor bonding. Further, if the dust is attached to an upper surface of a CCD element or a linear sensor, a picture element defect such as a black flaw will be generated at a portion of the upper surface where the dust is attached.
Further, to prevent electrostatic breakdown of the elements in cutting the wafer, CO.sub.2 is usually mixed in a pure water to set a specific resistance of the pure water to several M.OMEGA.. However, the mixing of CO.sub.2 causes acidification of the pure water to result in a short life of a cutting blade of the dicing apparatus. Further, a CO.sub.2 generating apparatus is necessary.
In manufacturing liquid crystal driving element arrays or opposing electrode arrays, an orientation film of the element is subjected to a rubbing process. However, in the rubbing process, there is a possibility that the dust attached to the upper surface of the liquid crystal driving element or the opposing electrode will flaw a thin film transistor (TFT) portion and a picture element display portion of the liquid crystal driving element or the opposing electrode. Further, wires of the element will also be marred or broken. As a result, an yield and a quality of the liquid crystal display device are reduced.
On the other hand, in the dicing method disclosed in Japanese Patent Publication No. 2-23324, the above problem due to the dust generating in cutting the wafer can be solved because the upper surface of the wafer is covered with the adhesive tape. However, as is apparent from FIG. 4 in Japanese Patent Publication No. 2-23324, the adhesive tape is peeled from the wafer after cutting the wafer, and the wafer is then divided into a plurality of individual semiconductor element arrays. However, dust is generated in dividing the wafer to contaminate the upper surfaces of the semiconductor element arrays. Further, there is no description concerning a material of the adhesive tape in the above-cited reference. If the material of the adhesive tape is opaque, a dicing alignment mark formed on the upper surface of the wafer cannot be read through the opaque adhesive tape, so that it is difficult to accurately cut the wafer into a desired shape.